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regarding the change of names mentioned in the document, such as hitachi electric and hitachi xx, to renesas technology corp. the semiconductor operations of mitsubishi electric and hitachi were transferred to renesas technology corporation on april 1st 2003. these operations include microcomputer, logic, analog and discrete devices, and memory chips other than drams (flash memory, srams etc.) accordingly, although hitachi, hitachi, ltd., hitachi semiconductors, and other hitachi brand names are mentioned in the document, these names have in fact all been changed to renesas technology corp. thank you for your understanding. except for our corporate trademark, logo and corporate statement, no changes whatsoever have been made to the contents of the document, and these changes do not constitute any alteration to the contents of the document itself. renesas technology home page: http://www.renesas.com renesas technology corp. customer support dept. april 1, 2003 to all our customers
cautions keep safety first in your circuit designs! 1. renesas technology corporation puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. trouble with semiconductors may lead to personal injury, fire or property damage. remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. notes regarding these materials 1. these materials are intended as a reference to assist our customers in the selection of the renesas technology corporation product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to renesas technology corporation or a third party. 2. renesas technology corporation assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. all information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by renesas technology corporation without notice due to product improvements or other reasons. it is therefore recommended that customers contact renesas technology corporation or an authorized renesas technology corporation product distributor for the latest product information before purchasing a product listed herein. the information described here may contain technical inaccuracies or typographical errors. renesas technology corporation assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. please also pay attention to information published by renesas technology corporation by various means, including the renesas technology corporation semiconductor home page (http://www.renesas.com). 4. when using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. renesas technology corporation assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. renesas technology corporation semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. please contact renesas technology corporation or an authorized renesas technology corporation product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. the prior written approval of renesas technology corporation is necessary to reprint or reproduce in whole or in part these materials. 7. if these products or technologies are subject to the japanese export control restrictions, they must be exported under a license from the japanese government and cannot be imported into a country other than the approved destination. any diversion or reexport contrary to the export control laws and regulations of japan and/or the country of destination is prohibited. 8. please contact renesas technology corporation for further details on these materials or the products contained therein.
hm62w16255hci series wide temperature range version 4m high speed sram (256-kword 16-bit) ade-203-1263b (z) rev. 2.0 dec. 5, 2002 description the hm62w16255hci is a 4-mbit high speed static ram organized 256-kword 16-bit. it has realized high speed access time by employing cmos process (6-transistor memory cell) and high speed circuit designing technology. it is most appropriate for the application which requires high speed, high density memory and wide bit width configuration, such as cache and buffer memory in system. the hm62w16255hci is packaged in 400-mil 44-pin soj and 400-mil 44-pin plastic tsopii for high density surface mounting. features ? single 3.3 v supply: 3.3 v 0.3 v ? access time: 12 ns (max) ? completely static memory ? no clock or timing strobe required ? equal access and cycle times ? directly ttl compatible ? all inputs and outputs ? operating current: 130 ma (max) ? ttl standby current: 40 ma (max) ? cmos standby current: 5 ma (max) ? center v cc and v ss type pin out ? temperature range: ? 40 to +85 c ordering information type no. access time device marking package hm62w16255hcjpi-12 12 ns hm62w16255cjpi12 400-mil 44-pin plastic soj (cp-44d) HM62W16255HCTTI-12 12 ns hm62w16255ctti12 400-mil 44-pin plastic tsopii (ttp-44de)
hm62w16255hci series rev. 2, dec. 2002, page 2 of 16 pin arrangement a0 a1 a2 a3 a4 i/o1 i/o2 i/o3 i/o4 v cc v ss i/o5 i/o6 i/o7 i/o8 a5 a6 a7 a8 a9 (top view) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 a17 a16 a15 i/o16 i/o15 i/o14 i/o13 v ss v cc i/o12 i/o11 i/o10 i/o9 nc a14 a13 a12 a11 a10 44-pin soj 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 a0 a1 a2 a3 a4 i/o1 i/o2 i/o3 i/o4 v cc v ss i/o5 i/o6 i/o7 i/o8 a5 a6 a7 a8 a9 a17 a16 a15 i/o16 i/o15 i/o14 i/o13 v ss v cc i/o12 i/o11 i/o10 i/o9 nc a14 a13 a12 a11 a10 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 44-pin tsop (top view) pin description pin name function a0 to a17 address input i/o1 to i/o16 data input/output cs chip select oe output enable we write enable ub upper byte select lb lower byte select v cc power supply v ss ground nc no connection
hm62w16255hci series rev. 2, dec. 2002, page 3 of 16 block diagram memory matrix 1024 rows 32 columns 8 blocks 16 bit (4,194,304 bits) cs v cc v ss a8 a9 a17 a15 a16 a0 a2 a4 column i/o column decoder i/o1 input data control row decoder cs cs i/o16 i/o9 i/o8 . . . . . . a14 a13 a12 a5 a6 a7 a11 a10 a3 a1 (lsb) (lsb) (msb) (msb)
hm62w16255hci series rev. 2, dec. 2002, page 4 of 16 operation table cs cs cs cs oe oe oe oe we we we we lb lb lb lb ub ub ub ub mode v cc current i/o1 ? ? ? ? i/o8 i/o9 ? ? ? ? i/o16 ref. cycle h standby i sb , i sb1 high-z high-z ? l h h output disable i cc high-z high-z ? l l h l l read i cc output output read cycle l l h l h lower byte read i cc output high-z read cycle l l h h l upper byte read i cc high-z output read cycle l l h h h ? i cc high-z high-z ? l l l l write i cc input input write cycle l l l h lower byte write i cc input high-z write cycle l l h l upper byte write i cc high-z input write cycle l l h h ? i cc high-z high-z ? note: h: v ih , l: v il , : v ih or v il absolute maximum ratings parameter symbol value unit supply voltage relative to v ss v cc ? 0.5 to +4.6 v voltage on any pin relative to v ss v t ? 0.5* 1 to v cc + 0.5* 2 v power dissipation p t 1.0 w operating temperature topr ? 40 to +85 c storage temperature tstg ? 55 to +125 c storage temperature under bias tbias ? 40 to +85 c notes: 1. v t (min) = ? 2.0 v for pulse width (under shoot) 6 ns 2. v t (max) = v cc + 2.0 v for pulse width (over shoot) 6 ns
hm62w16255hci series rev. 2, dec. 2002, page 5 of 16 recommended dc operating conditions (ta = ? 40 to +85 c) parameter symbol min typ max unit supply voltage v cc * 3 3.0 3.3 3.6 v v ss * 4 0 0 0 v input voltage v ih 2.0 ? v cc + 0.5* 2 v v il ? 0.5* 1 ? 0.8 v notes: 1. v il (min) = ? 2.0 v for pulse width (under shoot) 6 ns 2. v ih (max) = v cc + 2.0 v for pulse width (over shoot) 6 ns 3. the supply voltage with all v cc pins must be on the same level. 4. the supply voltage with all v ss pins must be on the same level. dc characteristics (ta = ? 40 to +85 c, v cc = 3.3 v 0.3 v, v ss = 0 v) parameter symbol min typ* 1 max unit test conditions input leakage current |i li | ? ? 2 a v in = v ss to v cc output leakage current |i lo | ? ? 2 a v in = v ss to v cc operating power supply current i cc ? ? 130 ma min cycle cs = v il , i out = 0 ma other inputs = v ih /v il standby power supply current i sb ? ? 40 ma min cycle, cs = v ih , other inputs = v ih /v il i sb1 ? 2.5 5 ma f = 0 mhz v cc cs v cc ? 0.2 v, (1) 0 v v in 0.2 v or (2) v cc v in v cc ? 0.2 v output voltage v ol ? ? 0.4 v i ol = 8 ma v oh 2.4 ? ? v i oh = ? 4 ma notes: 1. typical values are at v cc = 3.3 v, ta = +25 c and not guaranteed.
hm62w16255hci series rev. 2, dec. 2002, page 6 of 16 capacitance (ta = +25 c, f = 1.0 mhz) parameter symbol min typ max unit test conditions input capacitance* 1 c in ? ? 6 pf v in = 0 v input/output capacitance* 1 c i/o ? ? 8 pf v i/o = 0 v note: 1. this parameter is sampled and not 100% tested.
hm62w16255hci series rev. 2, dec. 2002, page 7 of 16 ac characteristics (ta = ? 40 to +85 c, v cc = 3.3 v 0.3 v, unless otherwise noted.) test conditions ? input pulse levels: 3.0 v/0.0 v ? input rise and fall time: 3 ns ? input and output timing reference levels: 1.5 v ? output load: see figures (including scope and jig) output load (b) (for t clz , t olz , t blz , t chz , t ohz , t bhz , t whz , and t ow ) d out 353 ? 319 ? 3.3 v 5 pf 1.5 v 30 pf d out rl = 50 ? output load (a) zo = 50 ? read cycle hm62w16255hci -12 parameter symbol min max unit notes read cycle time t rc 12 ? ns address access time t aa ? 12 ns chip select access time t acs ? 12 ns output enable to output valid t oe ? 6 ns byte select to output valid t ba ? 6 ns output hold from address change t oh 3 ? ns chip select to output in low-z t clz 3 ? ns 1 output enable to output in low-z t olz 0 ? ns 1 byte select to output in low-z t blz 0 ? ns 1 chip deselect to output in high-z t chz ? 6 ns 1 output disable to output in high-z t ohz ? 6 ns 1 byte deselect to output in high-z t bhz ? 6 ns 1
hm62w16255hci series rev. 2, dec. 2002, page 8 of 16 write cycle hm62w16255hci -12 parameter symbol min max unit notes write cycle time t wc 12 ? ns address valid to end of write t aw 8 ? ns chip select to end of write t cw 8 ? ns 8 write pulse width t wp 8 ? ns 7 byte select to end of write t bw 8 ? ns address setup time t as 0 ? ns 5 write recovery time t wr 0 ? ns 6 data to write time overlap t dw 6 ? ns data hold from write time t dh 0 ? ns write disable to output in low-z t ow 3 ? ns 1 output disable to output in high-z t ohz ? 6 ns 1 write enable to output in high-z t whz ? 6 ns 1 notes: 1. transition is measured 200 mv from steady voltage with output load (b). this parameter is sampled and not 100% tested. 2. if the cs or lb or ub low transition occurs simultaneously with the we low transition or after the we transition, output remains a high impedance state. 3. we and/or cs must be high during address transition time. 4. if cs , oe , lb and ub are low during this period, i/o pins are in the output state. then the data input signals of opposite phase to the outputs must not be applied to them. 5. t as is measured from the latest address transition to the latest of cs , we , lb or ub going low. 6. t wr is measured from the earliest of cs , we , lb or ub going high to the first address transition. 7. a write occurs during the overlap of a low cs , a low we and a low lb or a low ub (t wp ). a write begins at the latest transition among cs going low, we going low and lb going low or ub going low. a write ends at the earliest transition among cs going high, we going high and lb going high or ub going high. 8. t cw is measured from the later of cs going low to the end of write.
hm62w16255hci series rev. 2, dec. 2002, page 9 of 16 timing waveforms read timing waveform (1) ( we = v ih ) t aa t acs t oe t ba t blz t olz t clz t oh t chz t ohz t bhz t rc address valid address valid data d out cs oe lb , ub high impedance * 1 * 1 * 1 * 1 * 1 * 1 * 4 * 4
hm62w16255hci series rev. 2, dec. 2002, page 10 of 16 read timing waveform (2) ( we = v ih , lb = v il , ub = v il ) t aa t acs t rc t oe t clz valid data address cs d out valid address high impedance t ohz oe t oh t chz t olz * 1 * 1 * 1 * 1 * 4 * 4
hm62w16255hci series rev. 2, dec. 2002, page 11 of 16 write timing waveform (1) ( we controlled) address we * 3 t wc t aw t as t wr t wp t whz t olz t ow t ohz t cw t bw t dh t dw valid address valid data cs * 3 oe lb , ub d out d in high impedance * 2
hm62w16255hci series rev. 2, dec. 2002, page 12 of 16 write timing waveform (2) ( cs controlled) address cs * 3 t wc t aw t as t wr t wp t whz t olz t ow t ohz t cw t bw t dh t dw valid address valid data we * 3 oe lb , ub d out d in high impedance * 2 * 4
hm62w16255hci series rev. 2, dec. 2002, page 13 of 16 write timing waveform (3) ( lb , ub controlled, oe = v ih ) address d in -ub (d in -lb) d in -lb (d in -ub) d out high impedance valid address t dw t dh t cw t as t bw t wp t wc t wr t aw we * 3 cs * 3 ub ( lb ) lb ( ub ) t bw valid data t dw t dh valid data
hm62w16255hci series rev. 2, dec. 2002, page 14 of 16 package dimensions hm62w16255hcjpi series (cp-44d) 28.33 28.90 max 44 23 122 10.16 0.13 11.18 0.13 3.50 0.26 0.10 *0.43 0.10 9.40 0.25 2.65 0.12 0.74 1.30 max 1.27 0.80 +0.25 ?0.17 0.41 0.08 hitachi code jedec jeita mass (reference value) cp-44d conforms ? 1.8 g *dimension including the plating thickness base material dimension as of july, 2002 unit: mm
hm62w16255hci series rev. 2, dec. 2002, page 15 of 16 hm62w16255hctti series (ttp-44de) hitachi code jedec jeita mass (reference value) ttp-44de ? ? 0.43 g *dimension including the plating thickness base material dimension 0.13 m 0.10 0.80 44 23 122 18.41 18.81 max *0.27 ?0.07 1.20 max 10.16 0.13 ?0.05 11.76 ?0.20 0? ?5? *0.145 ?0.05 1.005 max 0.50 ?0.10 0.68 0.80 0.25 ?0.05 0.125 ?0.04 as of july, 2002 unit: mm
hm62w16255hci series rev. 2, dec. 2002, page 16 of 16 disclaimer 1. hitachi neither warrants nor grants licenses of any rights of hitachi?s or any third party?s patent, copyright, trademark, or other intellectual property rights for information contained in this document. hitachi bears no responsibility for problems that may arise with third party?s rights, including intellectual property rights, in connection with use of the information contained in this document. 2. products and product specifications may be subject to change without notice. confirm that you have received the latest product standards or specifications before final design, purchase or use. 3. hitachi makes every attempt to ensure that its products are of high quality and reliability. however, contact hitachi?s sales office before using the product in an application that demands especially high quality and reliability or where its failure or malfunction may directly threaten human life or cause risk of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation, traffic, safety equipment or medical equipment for life support. 4. design your application so that the product is used within the ranges guaranteed by hitachi particularly for maximum rating, operating supply voltage range, heat radiation characteristics, installation conditions and other characteristics. hitachi bears no responsibility for failure or damage when used beyond the guaranteed ranges. even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as fail-safes, so that the equipment incorporating hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the hitachi product. 5. this product is not designed to be radiation resistant. 6. no one is permitted to reproduce or duplicate, in any form, the whole or part of this document without written approval from hitachi. 7. contact hitachi?s sales office for any questions regarding this document or hitachi semiconductor products. sales offices hitachi, ltd. semiconductor & integrated circuits nippon bldg., 2-6-2, ohte-machi, chiyoda-ku, tokyo 100-0004, japan tel: (03) 3270-2111 fax: (03) 3270-5109 copyright ? hitachi, ltd., 2002. all rights reserved. printed in japan. hitachi asia ltd. hitachi tower 16 collyer quay #20-00 singapore 049318 tel : <65>-6538-6533/6538-8577 fax : <65>-6538-6933/6538-3877 url : http://semiconductor.hitachi.com.sg url http://www.hitachisemiconductor.com/ hitachi asia ltd. (taipei branch office) 4/f, no. 167, tun hwa north road hung-kuo building taipei (105), taiwan tel : <886>-(2)-2718-3666 fax : <886>-(2)-2718-8180 telex : 23222 has-tp url : http://semiconductor.hitachi.com.tw hitachi asia (hong kong) ltd. group iii (electronic components) 7/f., north tower world finance centre, harbour city, canton road tsim sha tsui, kowloon hong kong tel : <852>-2735-9218 fax : <852>-2730-0281 url : http://semiconductor.hitachi.com.hk hitachi europe gmbh electronic components group dornacher str 3 d-85622 feldkirchen postfach 201, d-85619 feldkirchen germany tel: <49> (89) 9 9180-0 fax: <49> (89) 9 29 30 00 hitachi europe ltd. electronic components group whitebrook park lower cookham road maidenhead berkshire sl6 8ya, united kingdom tel: <44> (1628) 585000 fax: <44> (1628) 778322 hitachi semiconductor (america) inc. 179 east tasman drive san jose,ca 95134 tel: <1> (408) 433-1990 fax: <1>(408) 433-0223 for further information write to: colophon 7.0

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